Cypress公司的CY3275是采用CY8CPLC20 PSoC的可編程低壓動力線通信開發套件,用于低帶寬的動力線通信.CY3275能進行系統設計,在低壓(12-24V AC/DC)動力線上發送數據高達2400 bps.本文介紹了CY8CPLC20主要特性,PSoC核方框圖,PLC 解決方案框圖,兩個節點的PLC 系統級方框圖以及CY3275可編低壓PLC開發套件主要特性,電路圖,材料廠清單和PCB元件布局圖.
CY8CPLC20: Powerline Communication Solution
The CY8CPLC20 is an integrated powerline communication (PLC) chip with the powerline modem PHY and network protocol stack running on the same device. Apart from the PLC core, the CY8CPLC20 also offers Cypress’s revolutionary PSoC technology that enables system designers to integrate multiple functions on the same chip.
CY8CPLC20主要特性:
■ Powerline communication solution
? Integrated powerline modem PHY
? Frequency shift keying modulation
? Configurable baud rates up to 2400 bps
? Powerline optimized network protocol
? Integrates data link, transport, and network layers
? Supports bidirectional half duplex communication
? 8-bit CRC error detection to minimize data loss
? I2C enabled powerline application layer
? Supports I2C frequencies of 50, 100, and 400 kHz
? Reference designs for 110 V/240 V AC and 12 V/24 V AC/DC Powerlines
? Reference designs comply with CENELEC EN 50065-1:2001 and FCC Part 15
■ Powerful Harvard-architecture Processor
? M8C processor speeds to 24 MHz
? Two 8x8 multiply, 32-bit accumulate
■ Programmable system resources (PSoC® Blocks)
? 12 Rail-to-Rail Analog PSoC Blocks provide:
• Up to 14-bit ADCs
• Up to 9-bit DACs
• Programmable gain amplifiers
• Programmable filters and comparators
? 16 Digital PSoC Blocks provide:
• 8 to 32-bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Up to four full duplex UARTs
• Multiple SPI™ masters or slaves
• Connectable to all GPIO Pins
? Complex peripherals by combining blocks
■ Flexible on-chip memory
? 32 KB flash program storage 50,000 erase or write cycles
? 2 KB SRAM data storage
? EEPROM emulation in flash
■ Programmable pin configurations
? 25 mA sink, 10 mA source on all GPIOs
? Pull-up, Pull-down, high Z, strong, or open drain drive Modes on all GPIO
? Up to 12 analog inputs on all GPIOs
? Configurable interrupt on all GPIOs
■ Additional system resources
? I2C slave, master, and multi-master to 400 kHz
? Watchdog and sleep timers
? User-configurable low-voltage detection
? Integrated supervisory circuit
? On-chip precision voltage reference
■ Complete development tools
? Free development software (PSoC Designer™)
? Full-featured in-circuit emulator (ICE) and programmer
? Full-speed emulation
? Complex breakpoint structure
? 128 KB trace memory
? Complex events
? C Compilers, assembler, and linker
圖1.Cypress PLC 解決方案框圖
圖2.CY8CPLC20 PSoC核框圖
CY3275可編低壓PLC開發套件
Cypress’s Powerline Communication (PLC) solution makes it possible to transmit command and control data over high-voltage and low-voltage powerlines. This solution is developed for low bandwidth powerline communication.
The CY3275 Programmable Low Voltage Powerline Communication Development Kit is a tool to do system design using the ability of the CY8CPLC20 devices to transmit data up to 2400 bps over Low Voltage (12-24V AC/DC) Powerlines.
CY3275可編低壓PLC開發套件主要特性:
User friendly PLC Control Panel application available on the kit CD-ROM
Chip power supply derived from 12V to 24V AC/DC
CY8CPLC20-OCD chip -- 100-pin TQFP on chip debug (OCD) device that allows for the quick design and debug of PLC applications
User configurable general purpose LEDs
General purpose 8-bit DIP switch
RJ45 connector to use ICE debugger
RS232 COM port for communication
Header to attach LCD card
I2C header for communicating to external devices
ISSP header for programming the CY8CPLC20 chip
CY3275可編低壓PLC開發套件包括:
CY3275 PLC LV development board
CY3275 Quick start guide
CD-ROM containing:
Packet Test software – PLC Control Panel application
CY8CPLC20 data sheet
User guide
Application note – Using CY8CPLC20 in Powerline Communication (PLC) Applications
CY3275 board schematics
CY3275 board Gerbers
PSoC Designer
PSoC Programmer
12V DC power supply
MiniProg1 for programming the CY8CPLC20 device
25 Jumper wires
LCD module
USB-I2C Bridge
Retractable USB cable
Daisy chain cable
Five CY8CPLC20-28PVXI Device Samples
圖3.PLC 系統級方框圖-兩個節點
圖4.CY3275可編低壓PLC開發板外形圖
圖5.CY3275可編低壓PLC開發板電路圖:用戶接口
圖6.CY3275可編低壓PLC開發板電路圖:發送和接收濾波器耦合
圖7.CY3275可編低壓PLC開發板電路圖:電源
CY3275可編低壓PLC開發板材料清單:
圖8.CY3275可編低壓PLC開發板元件布局圖
詳情請見:
http://www.cypress.com/?docID=30115
和
http://www.cypress.com/?docID=32000