1 引言

    20世紀90年代后期，嵌入式系統在工業控制、遠程監控和數據采集等領域的應用日趨廣泛，人們對嵌入式系統的存儲容量也提出了較高的要求。因此研制適用于嵌入式系統的大容量、高速率、高可靠性的數據存儲系統變得日益重要。本文針對一款基于ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" 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title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM" title="ARM">ARM920T芯片的開發板，根據ATA硬盤接口規范，設計了IDE硬盤接口電路，實現了對IDE硬盤的讀寫，可以在Linux系統中對其上的文件系統自由訪問，達到了高速率和高可靠性的要求。

2 ARM920T與S3C2410介紹

    ARM 包括一系列微處理芯片技術。ARM920T是ARM系列微處理器的一種，它采用5階段管道化ARM9TDMI內核，同時配備了Thumb擴展、EmbeddedICE調試技術和Harvard總線。在生產工藝相同的情況下，性能可達ARM7TDMI芯片的兩倍之多。ARM920T系列主要應用于機頂盒產品、掌上電腦、筆記本電腦和打印機。

    S3C2410處理器是Samsung 公司基于ARM公司的ARM920T處理器核，采用0.18umSU造工藝的32位微控制器。該處理器擁有獨立的16KB指令Cache和16KB數據Cache、MMU、支持TFT的LCD控制器、NAND閃存控制器、3路UART、4路DMA、4路帶PWM的Timer、I/O口、RTC、8路10位ADC、TouchScreen接口、IIC-BuS接口、IIS-BuS接口、2個USB主機、1個USB設備、SD主機和MMC接口和2路SPI。S3C2410處理器最高可運行在268MHz。

3 IDE接口及其規范

    IDE(Integrated Drive Electronics)是從IBM PC/AT上使用的ATA接口發展而來的。IDE/ATA磁盤驅動器與早期的ATA驅動器相比，增加了任務文件寄存器，包括數據寄存器、狀態寄存器以及反映地址的驅動器號、磁頭號、道號和扇區號寄存器等。ATA接口規范定義了信號電纜和電源線的電器特征、互聯信號的電器和邏輯特征，還定義了存儲設備中可操作的寄存器以及命令和協議。

3.1 寄存器

    規范定義了兩組寄存器：命令寄存器和控制寄存器。命令寄存器用來接收命令和傳送數據，控制寄存器用來控制磁盤操作。常用的寄存器包括數據寄存器、命令寄存器、驅動器/磁頭寄存器、柱面號寄存器、扇區號寄存器、扇區數寄存器和狀態寄存器。

3.2 數據傳輸方式

    ATA接口規范定義了兩種數據傳輸方式：可編程I/O(PIO)方式和DMA方式。PIO傳送方式下，CPU對控制器的訪問都是通過PIO進行的，包括從控制器讀取狀態信息和錯誤信息，以及向控制器發送命令和參數。在一次PIO數據傳輸過程中，CPU先選址，然后使讀/寫信號有效，CPU或控制器放數據到數據總線，控制器或CPU讀取數據，操作完成后，釋放總線，這樣一次數據傳輸完成。DMA方式，即直接內存訪問，CPU把緩沖區的地址與需要讀寫的長度告訴外設，外設在準備好后向CPU發出一個DMA請求，要求CPU暫停使用內存，獲得同意后就直接在內存和外設之間傳輸數據，完成后再把對內存的訪問權歸還給CPU。

4 硬件實現

    如圖1所示，S3C2410與硬盤之間接口電路分為3個部分：片選信號、數據信號和控制信號。硬盤上寄存器分為兩組，分別由IDE_CS0和IDE_CS1選中，DA0~DA2則用于組內寄存器尋址；數據線DD0~DD15因存在輸入/輸出方向問題，故用nOE(讀信號)接buffer(74LVTH162245)的DIR引腳來控制緩沖器方向；控制信號部分因該CPU與硬盤之間DMA時序不一致，故采用一塊EPM7032AETC44-7芯片用于調整其時序。PIO模式下，不需要DMARQ和nDMACK信號，DMA模式下，這兩個信號才起作用。

5 軟件實現

    硬盤驅動程序實現分為初始化、打開設備、設備I/O操作和釋放設備等幾部分。

5.1 硬盤初始化

    與X86不同，在ARM 體系結構中，對內存和外設的訪問使用統一的指令，所以要對外設地址進行內存映射。也就是說，通過一張表將I/O地址映射到內存空間中來，這部分工作是在系統初始化期間完成的。

    在IDE子系統初始化期間，Linux系統一旦發現一個IDE控制器，就設置它的ide_hwif_t結構來反映這個控制器和與之相連的磁盤；向Linux的VFS登記每一個控制器，并分別把它加到blk_dev和blkdevs向量表中；請求控制適當的IRQ中斷(主IDE控制器是14，次IDE控制器是15)和I/O空間(主控制器0x1f0，次控制器0x170)：為每一個找到的IDE控制器在gendisk列表中增加一個條目。

    IDE硬盤的初始化工作由idedisk_init完成：

    (1)在數組ide_hwifs中找出已登記得各IDE控制器控制的所有IDE硬盤(一個控制器最多控制兩個硬盤)，每個IDE硬盤對應一個ide_drive_t結構。

    (2)對找到的每個IDE硬盤，調用函數ide_register_subdriver填寫各IDE硬盤結構中的相關信息域，主要是填寫其驅動程序結構ide_driver_t。硬盤驅動中的函數do_rw_disk通過向磁盤控制寄存器寫參數啟動磁盤操作，完成真正的數據讀寫。

    (3)對找到的每個IDE硬盤，調用函數idedisk_setup進一步設置其ide_drive_t結構，包括設置該結構的settings域、doorlocking域、cyl、head、sect域、id域等。

5.2 打開設備

    打開塊設備的操作與打開普通文件的操作基本相同。

    (1)在當前進程的文件描述符表中為打開文件找一個空位，申請一塊內存，用于建立新文件的打開文件對象，即結構file。

    (2)解析設備特殊文件名，獲得其VFSinode和dentry結構，根據dentry結構填寫file結構，尤其是將file結構的f_op域設為其VFSinode中的缺省文件操作。

    (3)執行該文件操作集中的open操作，即blkdev_open，它根據設備特殊文件的主次設備號從blkdevs向量表中取出已經注冊的文件操作集(file_operations)fops，用該結構代替file結構中的f_op域。

    (4)執行中新文件操作集中的open操作，即bl帶頭kdev_open，它根據VFS

    inode中的i_rdev域查找數組ide_hwifsp[]，從中找出該IDE硬盤所對應的ide_drive_t結構；如果ide_drive_t結構中注冊有驅動程序，執行驅動程序集中的open操作。

    (5)將打開文件對象插入到當前進程的文件描述符表中，返回文件描述符，即打開文件對象在進程文件描述符表中的索引。

5.3 設備I/O操作

    讀寫塊設備時要用到塊緩沖區(bufer)，對bufer的管理采用BuferCache機制。它管理bufer的創建、撤銷、回收、查找、更新等，同時還要與系統中的其它部分(如文件系統、內存管理等)交互。Linux將Buffer

    Cache從塊設備驅動程序中獨立出來，作為對塊設備讀寫的通用機制，所以對塊設備的讀、寫、同步等操作采用的都是由操作系統提供的公共函數，一般為block_read()和block_write()。

    為了減少對塊設備操作的次數，讀寫塊設備時采用延遲操作，盡量將多個讀寫操作合并，所以操作請求不是馬上遞交給物理設備，而是提供了一種手段記錄每次的請求(request)，并為每類塊設備提供一個請求隊列用來排隊、合并、重組對該塊設備的請求。

    當需要從硬盤讀時，block_read()函數首先查找Buffer Cache

    如果在其中能找到需要的buffer，則立刻返回：否則，生成一個讀請求，并將其加入相應的請求隊列排隊。

    當需要向硬盤寫時，block_write()為此次寫操作生成一個buffer，而后生成一個寫請求，并將其加入相應的請求隊列排隊。

    塊設備驅動程序提供了一個請求處理函數，對硬盤而言是函數do_rw_disk。在適當的時候，硬盤的請求處理函數啟動，do_rw_disk處理在請求隊列上排隊的請求，通過向硬盤發出讀、寫命令完成對設備的真正操作。其偽代碼如下：

DO_RW_DISK(COMMAND)

{

Set_Registers()；

if(COMMAND=READ){

Set read_intr as interrupt process function

Send WIN_READ or WIN_MULTREAD

command to Command register

}

if(COMMAND=WRITE){

Send WIN_WRITE or

WIN_MULTWRITE command to Command register

Get the status of Status register

and set DRQ bit

Set write intr as interrupt process function

Senddatato buferin thedisk

}

}

5.4 釋放設備

    由設備驅動程序中的release操作完成，一般完成與打開設備相反的動作：釋放打開設備特殊文件時在file結構上所創建的私有結構；如果是最后一個設備的釋放，則從硬件上關閉設備。

6 結束語

    通過上述方法對IDE硬盤接口的設計與實現，我們可以在S3C2410開發板上安全自由地對硬盤上的各種文件系統進行訪問，由于采用DMA方式，可以滿足用戶對速率的要求。